Expertise
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Comprehensive analog & mixed-signal ASIC layout from block to chip top-level
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Whole stack experience: from silicon to bonding, packaging, encap & assembly
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Physical verification: DRC, LVS, layout extraction & foundry tape-out
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Floorplanning, power integrity, ESD, padrings, antenna & density solutions
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Cadence IC6.1, Virtuoso (X)L, Innovus
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Cadence PVS, Assura DRC & LVS
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Calibre DRC & Quantus QRC
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kLayout and open-source workflows
CAD Experience
Added Value
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Start-up experience
With a decade of being the sole layout engineer within a start-up, I understand the pressures and can deliver to demanding deadlines.
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Teamwork
My layout service is a flexible extension to your team. I work as a peer and can mentor less experienced engineers.
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Circuit design knowledge
Simulation that doesn't consider layout hides painful surprises. I can spot layout issues in schematic capture, saving you time & money.
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Packaging & Assembly
I can design your silicon for various packaging & assembly methods, from prototyping with minimal iterations, through to mass manufacture.
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Microfab experience
My silicon-proven layout expertise is built upon my firsthand cleanroom experience in CMOS microfabrication methods.
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Novel tech & methods
I'm not fazed by the esoteric, having PhD level experience at pushing CMOS to do new things; I can strike the balance between novelty & industrial discipline.